VHDL, the IEEE standard hardware description language for describing digital electronic systems, has recently been revised. This book has become a standard in the industry for learning the features of VHDL and using it to verify hardware designs. This third edition is the first comprehensive book on the market to address the new features of VHDL-2008.
* First comprehensive book on VHDL to incorporate all new features of VHDL-2008, the latest release of the VHDL standard...helps readers get up to speed quickly with new features of the new standard.
* Presents a structured guide to the modeling facilities offered by VHDL...shows how VHDL functions to help design digital systems.
* Includes extensive case studies and source code used to develop testbenches and case study examples..helps readers gain maximum facility with VHDL for design of digital systems.
1. Cover image 2. Title page 3. Table of Contents 4. Front-matter 5. Copyright 6. Dedication 7. Preface 8. Chapter 1. Fundamental Concepts 9. Chapter 2. Scalar Data Types and Operations 10. Chapter 3. Sequential Statements 11. Chapter 4. Composite Data Types and Operations 12. Chapter 5. Basic Modeling Constructs 13. Chapter 6. Subprograms 14. Chapter 7. Packages and Use Clauses 15. Chapter 8. Resolved Signals 16. Chapter 9. Predefined and Standard Packages 17. Chapter 10. Case Study: A Pipelined Multiplier Accumulator 18. Chapter 11. Aliases 19. Chapter 12. Generics 20. Chapter 13. Components and Configurations 21. Chapter 14. Generate Statements 22. Chapter 15. Access Types 23. Chapter 16. Files and Input/Output 24. Chapter 17. Case Study: A Package for Memories 25. Chapter 18. Test Bench and Verification Features 26. Chapter 19. Shared Variables and Protected Types 27. Chapter 20. Attributes and Groups 28. Chapter 21. Design for Synthesis 29. Chapter 22. Case Study: System Design Using the Gumnut Core 30. 22.1 Overview of the Gumnut 31. 22.2 A Behavioral Model 32. 22.3 A Register-Transfer-Level Model 33. 22.4 A Digital Alarm Clock 34. Chapter 23. Miscellaneous Topics 35. APPENDIX A: Standard Packages 36. APPENDIX B: VHDL Syntax 37. APPENDIX C: Answers to Exercises 38. References 39. Index
VHDL, the IEEE standard hardware description language for describing digital electronic systems, has recently been revised. This book has become a standard in the industry for learning the features of VHDL and using it to verify hardware designs. This third edition is the first comprehensive book on the market to address the new features of VHDL-2008.
* First comprehensive book on VHDL to incorporate all new features of VHDL-2008, the latest release of the VHDL standard...helps readers get up to speed quickly with new features of the new standard.
* Presents a structured guide to the modeling facilities offered by VHDL...shows how VHDL functions to help design digital systems.
* Includes extensive case studies and source code used to develop testbenches and case study examples..helps readers gain maximum facility with VHDL for design of digital systems.
1. Cover image 2. Title page 3. Table of Contents 4. Front-matter 5. Copyright 6. Dedication 7. Preface 8. Chapter 1. Fundamental Concepts 9. Chapter 2. Scalar Data Types and Operations 10. Chapter 3. Sequential Statements 11. Chapter 4. Composite Data Types and Operations 12. Chapter 5. Basic Modeling Constructs 13. Chapter 6. Subprograms 14. Chapter 7. Packages and Use Clauses 15. Chapter 8. Resolved Signals 16. Chapter 9. Predefined and Standard Packages 17. Chapter 10. Case Study: A Pipelined Multiplier Accumulator 18. Chapter 11. Aliases 19. Chapter 12. Generics 20. Chapter 13. Components and Configurations 21. Chapter 14. Generate Statements 22. Chapter 15. Access Types 23. Chapter 16. Files and Input/Output 24. Chapter 17. Case Study: A Package for Memories 25. Chapter 18. Test Bench and Verification Features 26. Chapter 19. Shared Variables and Protected Types 27. Chapter 20. Attributes and Groups 28. Chapter 21. Design for Synthesis 29. Chapter 22. Case Study: System Design Using the Gumnut Core 30. 22.1 Overview of the Gumnut 31. 22.2 A Behavioral Model 32. 22.3 A Register-Transfer-Level Model 33. 22.4 A Digital Alarm Clock 34. Chapter 23. Miscellaneous Topics 35. APPENDIX A: Standard Packages 36. APPENDIX B: VHDL Syntax 37. APPENDIX C: Answers to Exercises 38. References 39. Index
